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VHDL frequency counter with LCD and softcore(Picoblaze)

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hatem001

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I am a student who is realizing a frequency_counter based FPGA using a Spartan-3E Starter Kit Board .. At first I must create a VHDL Code which describes the frequency_counter (frequency meter)
can u help me??and thank you in advance ..
the oscillation frequency in this kit is 5O MHZ(quartz) I have to divide and create a window to accounting 1 second with which I will count the rising edge of the signal measured ... So I must create a counter also who will count the rising edge ..
In addition,I Think that i must implemented a soft core for example picoblaze which we will display the result on the LCD screen found in the Spartan-3E Starter Kit
Board...

can u help me??and thank you in advance ..
 

You can go through Xilinx reference design here:

**broken link removed**

Project files:

**broken link removed**
 

Thx Mr for your advice

YES I've ever seen ... but I did not understand the usefulness of the two counters count a-, b-count .... In addition to the switch control module counter is not quite clear
 

me

hi,i am trying to use the picoblaze implemented frequency counter using KCPSM3...............its the same program given on xilinx frequence counter which is for Spartan 3E XC500E . but i am having a spartan 3 kit and i am trying to program it on spartan 3 ,i am getting some errors which i am unable to solve ...can some one help me with the errors............

the errors are:-
Pack:679 - Unable to obey design constraints (LOC=SLICE_X8Y29) which
require the combination of the following symbols into a single SLICEM
component:
MUXCY symbol "processor/sel_shadow_muxcy" (Output Signal =
processor/sel_carry<0>)
MUXCY symbol "processor/zero_cymux" (Output Signal = processor/zero_carry)
The carry muxes are not connected in the required manner. Please correct the
design constraints accordingly.
 

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