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Implementing SDR Controller on Xilinx Spartan3

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3Deye

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Hi,

I am designing my own SDR SDRAM memory controller in VHDL (by the help of Manticore's MC design) and need to know if it could be implemented on Xilinx Spartan3 Starter's kit or not ?

I am confused because in this page (**broken link removed**) of Xilinx's SDR Controller, they mention the Spartan3 as one of the supported devices, while in the Spartan's family datasheet here (https://www.xilinx.com/support/documentation/data_sheets/ds529.pdf) they mention that they support DDR/DDR2 !
 

SDR is a sub set of the DDR memory which is faster and more complicated, if a device supports DDR or DDR2, then you can be sure that it supports SDR SDRAM.
 

Hi farhada!

Pin count is different:

For DIMMs:
SDR SDRAM = 168 Pins
DDR SDRAM = 184 Pins
DDR2/3 SDRAM = 240 Pins

For SO-DIMMs:
SDR SDRAM = 144 Pins
DDR1/2 SDRAM = 200 Pins
DDR3 SDRAM = 204 Pins

So how could the kit be compatible with DDR and SDR ?!

Btw, most of the boards are compatible with DDR/DDR2 SDRAM SO-DIMM since they have the same number of pins and the difference is in the bandwidth and the signaling/timing parameters which could be managed by the memory controller, but I doubt the compatibility between DDR and SDR!
 

The spartan3 starter kit does not have any memory other than SRAM on it, if you want to connect any type of SDRAM to it, you have to make your own adapter board to connect to it.

You can then make your own SDRAM controller or use the one generated by Xilinx's MIG to access it.

I am pretty sure you will have a lot of problems supporting any SDRAM over 66MHz on a SPARTAN3 (even 66 MHz with the connectors on that board and your own adapter board sounds tough).

Best regards,
/Farhad Abdolian
 

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