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- 26th February 2009, 20:37 #1

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## phase margin

To calculate phase margin do I always use

PM=180+phase(t.f) where, t.f. is the closed loop transfer fn.

So for example say the phase at 0db is +120, then what is the PM,

180+120=300 OR 180-120=60

Thanks

- 26th February 2009, 20:37

- 27th February 2009, 05:23 #2

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## how to calculate phase margin

I believe the transfer function will determine the sign or direction of the margin

- 27th February 2009, 06:12 #3

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## phase margin basic theory

transfer function will tell u,but if u r getting 120,then it is to be 120

- 27th February 2009, 09:20 #4

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## calculating phase margin

Originally Posted by**analog_match**

Here is a recommendation from my side:

Before calculating phase margin you should find a definition for that.

Here it is:

Phase margin is related to the LOOP GAIN (thatīs the gain of the OPEN LOOP) and it is the difference between 180 deg and the actual phase at the frequency where the LOOP GAIN is 0 dB.

- 27th February 2009, 09:20

- 2nd March 2009, 18:23 #5
## what is phase margin

In your example the phase margin is 60deg.

It's really the difference between 180 deg and the actual phase of the system at 0dB.

- 2nd March 2009, 18:47 #6

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## bode plot, phase correction

Originally Posted by**VVV**

But you have to calculate with the loop gain phase instead (loop open).

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- 2nd March 2009, 18:47

- 3rd March 2009, 23:32 #7

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## cadence open loop phase margin

Thanks all for your reply to this question.

LvW, I have a comment and then a further question to this thread:

So basically what you are saying is if we have a t.f. G=A/(1+A*f)

where:

A->open loop gain.

f->gain of feedback network.

Then phase margin is calculated from magnitude and phase plot of the loop gain A*f, correct??

Now my question which stems from my confusion of how do I plot the magnitude and phase of loog gain, A(s)*f(s) to calculate the phase margin.

Generally when we measure a gain in a simulation tool like Pspice or cadence spectre etc. we have some input src and we put a signal of magnitude 1 in the "A.C. magnitude" field to linearize the circuit and then simply do an a.c. analysis on the output port. But this gives us the bode plot of G(s).

If I open the loop then I can get bode plots of A(s) and f(s) individually but how do I get the bode plot of A(s)*f(s).

Thanks

- 4th March 2009, 14:31 #8

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## pspice phasemargin measurement

Originally Posted by**analog_match**

1.) Ground the "normal" input

2.) Open the loop and inject an ac test signal of 1 volt at one node of the cut and watch/draw the voltage at the other node of the cut.

3.) Thatīs the PRINCIPLE. However, in most cases the bias point is lost or changed by openeung the loop. Thatīs the reason several articles and papers have been written to solve this. There are several "tricky" methods.

The simplest method is to place the test voltage source BETWEEN both nodes of the cut. This works only if the cut is done at a low impedance point (opamp output)

Any further questions ?

Added after 1 hours 4 minutes:

I forgot to mention, that in case of a test voltage in series with the cut (between) you always have to calculate the ratio output/input - even when the test voltage is 1 volt.

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- 4th March 2009, 16:26 #9

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## how to calculate phase from transfer function

Thanks LvW. Your insight has been very helpful.

- 16th April 2009, 18:48 #10

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## calculate phase margin

Hello All

If you decide to inject an AC source directly in your circuit to break the loop, how would you calculate the phase margin?

Would it be difference of the phase between out and in?

- 18th April 2009, 18:54 #11

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## example for phase margin

Originally Posted by**parkl**

- 18th April 2009, 18:54

- 19th April 2009, 17:47 #12

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## calculation of gain and phase margin in cadence

hi,

Using bode plot u can find the phase margin for both open loop and closed loop systems.. the magnitude plot and the phase plot are drawn and then phase angle at gain cross over frequency is found out and it is added with 180 degree..

- 19th April 2009, 17:56 #13

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## open loop closed loop phase margin

Originally Posted by**gaya_pink****open loop**system.

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