Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

why and where to use filler vs spare cells in the PD flow

Status
Not open for further replies.
jitendravlsi

jitendravlsi

Full Member level 2
Joined
Jul 21, 2008
Messages
132
Helped
8
Reputation
16
Reaction score
5
Trophy points
1,298
Activity points
2,136
filler vs spare cells

hi

why and where to use filler & spare cells in the PD flow.
is there any other cell apart from these two to take care about during the flow?

thnx in advance.
 

filler vs spare cells

filler cell is continuity for ur vdd/gnd rails,of the design. spare cells is used to ECO stage.spare cell u can implement of ur logic
 

filler vs spare cells

filler cell is also dummy poly/OD in 40nm cell library, which is used for process uniformity.
 

Re: filler vs spare cells

would u please tell me in detail what is this

dummy poly/OD....


THANX FOR RESPONSE
 

Re: filler vs spare cells

Hi,

Filler cells are the basic cells used to make well continuity, mostly they doesn't contain any functionality. While spare cells are the extra functional cells kept in the design for ECO (Engg. change order). The number of sparecells and their type i.e. AND, OR, DFF ect. depends on the design complexity and functionality, but it is advisable to use universal gates so that we can get most of the functionality.

It may help you.

Thanks..

HAK..
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top