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design of low noise amplifier in 'TECH_C35B4'

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macg84

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tech_c35b4

Hello,
I have a great problem...I have to design a low noise amplifier , who has the following features:

1)V DD = 3V
2)Zindiff = 200Ω (RSdiff = 200Ω)
3)I BIAS = 5mA
4)f 0 = 1.8GHz
5) All the transistor should have minimum legth

-I have to use a differential amplifier

what can I do to design this LNA?? Where can I find the rules to design this LNA??
In enclosure there is the scheme of LNA that I have to consider.
Thenk you
 

macg84 said:
what can I do to design this LNA?? Where can I find the rules to design this LNA??
In enclosure there is the scheme of LNA that I have to consider.
Thenk you
Click to expand...

Hello macg84,
seems you have already quite a good schematic template to start with. I'd suggest you study the Cadence SpectreRF LNA workshop first (you can find it here) :

Work through the full example given there to learn the simulation methodology. After this you can try and optimize your own schematic. To start with, use a large W/L ratio (order of 50..100) for your input transistors (if not already given, it's not visible in your image).
Good luck! erikl
 

Thanks erik, but my first problem is to understand how planning W and L of the MOS in LNA sheme to respect the specifications:

1)V DD = 3V
2)Zindiff = 200Ω (RSdiff = 200Ω)
3)I BIAS = 5mA
4)f 0 = 1.8GHz
5) All the transistor should have minimum legth
 

Sorry macg84,
but I can't give you more info than that above. I've never designed such an LNA myself. I just told you how I'd start myself. You should learn how to use the tools, start with your example and optimize it according to your requirements using the simulation tool.
Choose a sunny day and start learning!
Have fun! erikl
 

Thank you very much erik :D I'm beginning to leran the tools today, and if I will learn how to design a LNA I will tell you...
BYE
 

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