amitjagtap
Full Member level 5
pll fpga
hi all,
As all we know, now a days there are PLL included in almost all FPGA. I'm keen to know whether we (a programmer ) can select a perticular PLL for his application like clk synchronoization, or a tool itself does this task wherever it is required without informing to user....
The other way arround if i Know at this perticular stage/ location of circuit/logic i should put a PLL ... .in this case can we user PLL resided in FPGA selectively....
or there is no as such option there....
Pls let me know...
Thanking you.:idea:
hi all,
As all we know, now a days there are PLL included in almost all FPGA. I'm keen to know whether we (a programmer ) can select a perticular PLL for his application like clk synchronoization, or a tool itself does this task wherever it is required without informing to user....
The other way arround if i Know at this perticular stage/ location of circuit/logic i should put a PLL ... .in this case can we user PLL resided in FPGA selectively....
or there is no as such option there....
Pls let me know...
Thanking you.:idea:
