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In order to simulate mismatch, you need your technology files to include the statistics variation information of MOS transistors (if you are talking CMOS). Then you can perform a montecarlo analysis of your circuit with a few runs (as much as possible) and you can see the variation.
A current steering is basically a big current mirror .The main mismatch error source is the one between the current sources that form the mirror. The best thing you can do there is make them large, as much as your voltage range allows you.
I guess if what you really want is to find out the DNL/INL at each code for the dac and the worst cases, instead of simulating it is better to write a matlab/octave code with the known Avt mismath number of the process. This will be much faster than a monte carlo simulation.
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