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Spartan 3E's Memory Capacity

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as Indicated on the userguide for Spartan 3E, they wrote for my XC3S500E Device,

Ram Column : 2
Ram Blocks per Column: 10
Total Ram Blocks: 20
Total Ram Bits: 368,640
Total Ram KBits: 360k

with the above in mind, does it mean that the Block-Ram FIFO i generate with the core generator,

for the Write Width of 8, can only set my Write Depth to 360k/8 at the maximum?


what happens if I set it to higher than 360k/8 for my Write Depth?
 

My short answer is: Try it and see -- that's how to learn ISE! (Sorry about the bad rhyme.)

Longer answer ...

If you select 8 bit width, coregen will configure each block RAM as 2Kx9, and then it will use 8 of those 9 bits. Your FPGA provides 20 such block RAMs.

I don't know which FIFO Generator version you are using, but version 4.3 (ISE version 10.1.02) allows only power-of-two depth, so the largest block RAM FIFO that it can generate (and will fit into your FPGA) is 32 kilobytes (16 block RAMs). Coregen can generate larger FIFO cores, but they won't fit into your FPGA. If you try to use a too-big core, you will get error messages sometime later during the place-and-route process.
 

Im using ver 4.2 of the core generator

Im running out of space for my block ram.

I've changed it to 5bits width and 65k depth..I wonder if this increase my capacity further or not.


should I run out of space totally, what should I do? Does the distributed ram form allows more capacity?
 

64Kx5 is 320 kilobits, which isn't quite the full 360 kilobits. Remember that each block RAM has 18 kilobits when using widths of 9, 18, or 36 bits. The narrowest single-core arrangement that I can think of that uses all 360 kilobits is 8Kx45.

Another option would be to cascade two FIFOs of different depth that add up to 360 kilobits.
Or you could design your own FIFO in HDL, to avoid the power-of-two depth limitation.

The last page of the FIFO Generator shows how many block RAMs will be used. Be careful not to exceed 20.

The FIFO core generator can use either block RAM or distributed RAM, but it won't generate a core containing both types of RAM. You would need to generate two different cores and combine them in your project.
 

I maxed out my block ram....but my FIFO still end up being full..every now and then
 

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