Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

questions on implementation of multilayer ahb

Status
Not open for further replies.

Sunny.Wen

Newbie level 2
Joined
Dec 9, 2007
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,308
amba ahb early burst termination

Hi,

I am designing a multilayer ahb, and finding that it needs a lots of combinatorial paths, because it cannot be judged until the address phrases have been started whether more than one layer are accessing the same slave. Or it can be done to delay every transfer for one clock cycle with holding hready low, and surely this will cost a lot in efficiency. What's more, I have read that combinatorial paths are not allowed in ahb on www.arm.com.

Could anyone who have the experience of multilayer ahb explain this problem please?

Additionally, I am still looking for the verification tools for the bus. However, I have found tools for verifying ahb-based ip. I appreciate that you can have a dicussion on that too. Is VMT(Verification Modeling Technology) from synopsys suitable?

//***********from www.arm.com FAQ*********
//
7) Can an arbiter be designed to always allow bursts to complete?

A SPLIT, RETRY or ERROR response from a slave can always cause a burst to be early terminated. This is outwith the control of the Arbiter and so must be supported.

Undefined length INCR bursts cannot have their end point predicted, so there is no efficient way that an Arbiter design can allow the burst to complete before granting another master. INCR bursts must be arbitrated on a cycle by cycle basis.

Defined length INCRx and WRAPx bursts can have their beats counted, and so allowed to complete by the Arbiter. However because of the AHB arbitration synchronous timing, there is no way to avoid possibly terminating a burst immediately after the first transfer of the burst has been indicated.

The Arbiter only knows that a defined length burst is in progress by sampling the HBURST bus. However the first point at which HBURST can be sampled is after the first clock cycle of the first burst beat, by which time the Arbiter may already have decided to grant another master and will have changed the HGRANT outputs accordingly. Only a combinatorial path from HBURST to HGRANT would allow the burst to be detected in time to avoid early termination in this scenario, but combinatorial paths in the AHB bus are not allowed
//************************

Regards

Sunny
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top