Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to test dnl of adc under cadence ?

Status
Not open for further replies.

wls

Member level 4
Joined
Jul 26, 2001
Messages
75
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Location
Singapore
Activity points
856
how to measure dnl of a dac using ahdllib

Hello . I am trying to get the DNL from 10 bit sar adc ? I am using , cadence library "ahdlLib , dac_10bit_ideal " to convert the 10 bit ADC ramping output " D9:D0 to analog signal . Then using , " cadence library " ahdlLib , dac_dnl_10bit " to get the DNL of the ADC ? It supposed to output a histogram file or someting . But I dont see any file ? I actually change the original , ahdlLib dac_dnl_8bit to 10 bit dnl .

How does , cadence ahdlLib , dac_dnl_8bit work ? Have anyone used it before ?
I able to get dac output vout , attached picture but how to measure dnl ?

Regards.
 

cadence dnl test

dump the Cadence simulation data into Matlab.
there are many exiting dnl,inl matlab program.
 

measure dnl cadence

i had used that model,but difficulty to implement due to long simulation time. you can also change verilog-A code into 10-bit
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top