wwfhm2002
Member level 5
power on reset circuit
I have a idea to reset digital logic after power on, without power on reset circuit and hard pin reset. The idea is:
design a 64bit counter, when power on, the counter will be in a unknown state, so if the counter!=0, we generate a reset signal, else do nothing. In theory, this logic only error at 1/(2^64) probability. And we can using anothe small counter to shape the reset signal active time to that of we expected.
Any problem?
I have a idea to reset digital logic after power on, without power on reset circuit and hard pin reset. The idea is:
design a 64bit counter, when power on, the counter will be in a unknown state, so if the counter!=0, we generate a reset signal, else do nothing. In theory, this logic only error at 1/(2^64) probability. And we can using anothe small counter to shape the reset signal active time to that of we expected.
Any problem?