ananthan95
Junior Member level 3
I am trying to write a VHDL test bench. the issue is, I have to write a code in such a way that a delay of 1000ns has to be executed in the beginning and later on the delay period is 620ns. so what should i do?
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Code VHDL - [expand] 1 2 3 4 5 6 7 8 process -- action code wait for 1000 ns; loop -- action code wait for 620 ns; end loop; end process;