Corner to Corner variation of Vbe at room temperature

My question is about how much Vbe for a bipolar at a given current do you see vary from typical corner to slow corner and from typical to fast corner in the process models. I have normally seen +/- 2.5% normally.
I recently see in 1 process that the corner variation setup is 0.3% or 0.6% which seems really good. What they have done is set the corner limits as the 4 sigma limits of the parametric test data they have received from previous lots.

Are these actually very low spread values from a dedicated analog bipolar process?
Vanilla CMOS process parasitic BJT Vbe values of course show much higher dispersion.

Vbe "should" be very well controlled - if it's a feature of
the technology and not some "opportunistic" device that
has no explicit process control point.

4 sigma limits sounds swell but what do you know about
sample size and sampling period? Some process attributes
drift wide but slowly, and 100 lots from a 1 month window
gets you no insight but 10 lots over 2 years would scare
the bejeezus out of you if you were expecting to make a
1% untrimmed bandgap.

There are also questions about how you will measure Vbe.
If it's spec'd at a fixed Ic then now you have hFE in the
mix as well (something that is more prone to variation
than the sum of two implants (base and emitter, as-
driven).

In CMOS-only (or CMOS-pretty-much) technologies the
corners are oxide thickness, surface mobility and VT implant
pretty much - none of these touch a bipolar. So you
might be seeing "we don't care" in the 0.3% "good"
case just because they didn't.

I should have mentioned that this process is a BiCMOS process. But the variation even for the parasitic device is the same order. I am not sure what is the time length and number of lots over which the data was collected. I will dig deeper into it.

Thanks