r1caw ex ua6bqg
Member level 2
Hi all!
I am trying to remove some ICGs from my (already placed but not cts/routed) design in ICCompiler by using command "remove_clock_gates -gating_cells $ICG_CELLNAME". Command executes correctly and at the end reports similar like this:
...Information: ICC will remove 1 clock-gating cells.
...Information: ICC will remove clock_gating for 5 registers.
...Information: Updating database...
1
But, after applying this command, $ICG_CELLNAME is not removed - I can see it on placed design (or, say, using "get_cell" command). Yes, I understand that this command reports that "ICC will remove", so the question is: how actually (physically) remove this clock gate and associated logic using command "remove_clock_gates", i.e. commit removing? I tried psynopt and place_opt commands after "remove_clock_gates" but this clock gate and associated logic already present in the design.
I am trying to remove some ICGs from my (already placed but not cts/routed) design in ICCompiler by using command "remove_clock_gates -gating_cells $ICG_CELLNAME". Command executes correctly and at the end reports similar like this:
...Information: ICC will remove 1 clock-gating cells.
...Information: ICC will remove clock_gating for 5 registers.
...Information: Updating database...
1
But, after applying this command, $ICG_CELLNAME is not removed - I can see it on placed design (or, say, using "get_cell" command). Yes, I understand that this command reports that "ICC will remove", so the question is: how actually (physically) remove this clock gate and associated logic using command "remove_clock_gates", i.e. commit removing? I tried psynopt and place_opt commands after "remove_clock_gates" but this clock gate and associated logic already present in the design.