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[SOLVED] Moved]: Stability analysis of DC-DC converter in Cadence using SpectreRF

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vieha007Electronic

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Hi,

I am sorry if my question here is not appropriate.

I am designing the DC-DC converter (Buck) in Cadence. The compensation has been calculated and the simulation in time domain is very okay at different load/line conditions. In order to verify the stability of full design, the analysis of phase margin/gain margin using SpectreRF; particularly using PSS/PCA or PSS/PTSB) has been widely used and recommended.

I have make some effort to simulate but I couldn't finish.

Anyone have experienced this work? If yes, it would be very nice if you recommend some tutorial or related documents.

Really appreciate your help :smile::smile::smile:
 

Re: Stability analysis of DC-DC converter in Cadence using SpectreRF (PSS/PCA or PSS/

You need to do pstab as you would do the normal stb analysis. You need to run pss to be able to do pstb. The fundamental pss frequency should be the clock frequency. Specify an appropriate range of frequencies for doing pstb.
 
Re: Stability analysis of DC-DC converter in Cadence using SpectreRF (PSS/PCA or PSS/

Thank for your reply. You're correct.

I have finished the simulation. The only things should be noticed is that since I used the real ramp+clk circuit for the dc-dc converter, the oscillator option must be checked.
 

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