Reeyam
Newbie level 6
Hi,
My project is design and implementation network on chip based VHDL
I used Xilinx ISE and Synthesizing but i don't know how to find (area, latency, throughput, power) of the design
I get the information in report (design summary, timing summary) in attachment.
So what is meant memory usage ?
Please can anyone help me if he know how finding them?
My project is design and implementation network on chip based VHDL
I used Xilinx ISE and Synthesizing but i don't know how to find (area, latency, throughput, power) of the design
I get the information in report (design summary, timing summary) in attachment.
So what is meant memory usage ?
Please can anyone help me if he know how finding them?