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Problem to create and connect a net between two flip-flops

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msdarvishi

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Dear all,

I would like to create two flip-flops entitled "white_FF" and "black_FF" using Tcl script and then create and connect a routable net between them. To achieve that, I wrote the following scripts:

Code: 
create_cell -reference FDCE white_FF
startgroup
place_cell white_FF SLICE_X0Y50/A5FF
endgroup


create_cell -reference FDCE black_FF
startgroup
place_cell black_FF SLICE_X0Y50/AFF
endgroup


connect_net -net inp -objects {white_FF/Q}
connect_net -net inp -objects {black_FF/D}

After execution of this Tcl script I see no net connected between Q output of white_FF and D input of black_FF !!!

Can anybody help me to some this problem? Kind replies and helps are in advance appreciated.

Regards,
 

you need to find the route using the find_routing_path commandand using set_property fixed_route to route the path (like you've done before) or just use route_design for the path if you don't care how it's routed. Look at UG835 for details on those commands.

But I also don't see the create_net command in your script, which is probably the root of the problem.
 

ads-ee said:
you need to find the route using the find_routing_path commandand using set_property fixed_route to route the path (like you've done before) or just use route_design for the path if you don't care how it's routed. Look at UG835 for details on those commands.

But I also don't see the create_net command in your script, which is probably the root of the problem.
Click to expand...


Dear @ads-ee,

Thank you so much for your reply. I manipulated the script like below and now it works ! I executed the following scripts, it confirms that the net "myEnable" is connected and routed and it is visible when we ask for its schematic, but as you see in the attached photo, the route does not appear in the Device view ! Do you have any idea?

I also tried to use find_routing_path command in order to find a path between two flip-flops but it does not work and I do not see any routing between white_FF and black_FF !!! Seems weird !!

Thanks and Regards,


Code: 
create_cell -reference FDCE white_FF
startgroup
place_cell white_FF SLICE_X0Y50/A5FF
endgroup

create_cell -reference FDCE black_FF
startgroup
place_cell black_FF SLICE_X0Y50/AFF
endgroup
 
create_net myEnable
 
connect_net -net myEnable -objects {white_FF/Q}
connect_net -net myEnable -objects {black_FF/D}

route_design -nets [get_nets white_FF/Q] 

find_routing_path -from [lindex [get_nodes -of [lindex [get_site_pins -of [get_nets white_FF/Q]] 1]]] -to [lindex [get_site_pins -of [get_nets black_FF/D]] 0]] 0]


 

Try using the net name...

route_design -nets [get_nets myEnable]

white_FF/Q is not a net it's a BEL pin
 

ads-ee said:
Try using the net name...

route_design -nets [get_nets myEnable]

white_FF/Q is not a net it's a BEL pin
Click to expand...



Dear @ads-ee,

Thank you ! Your hint works and it reports that the routing is complete but I am surprised why I do not see the GREEN routing between the white_FF/Q and the black_FF/D ?!! It seems weird ! Just when I do click on the Q output of white_FF and D input of black_FF, I see its name is myEnable ! That's all !!!

Regards,
 

I tried it on my test design and it worked without a hitch...

I used the following command sequence:
Code: 
create_cell -reference FDCE white_FF
place_cell white_FF SLICE_X0Y0/A5FF
create_cell -reference FDCE black_FF
place_cell black_FF SLICE_X0Y0/AFF
create_net mynet
connect_net -net mynet -objects {white_FF/Q black_FF/D}
route_design -nets [get_nets mynet]
after it ran the routed net just appeared...
Capture.PNG
 
ads-ee said:
I tried it on my test design and it worked without a hitch...

I used the following command sequence:
Code: 
create_cell -reference FDCE white_FF
place_cell white_FF SLICE_X0Y0/A5FF
create_cell -reference FDCE black_FF
place_cell black_FF SLICE_X0Y0/AFF
create_net mynet
connect_net -net mynet -objects {white_FF/Q black_FF/D}
route_design -nets [get_nets mynet]
after it ran the routed net just appeared...
View attachment 138650
Click to expand...


Dear @ads-ee,

Excellent ! It works at my end as well. Just as a note for future enquieries on this post, it is better to place the cells in the SLICEs where their global signals such as CLK, RST, etc. are already there. In this case, once you place your cell, those global signals wil be connected automatically without necessity to have a command to connect them by script. I also put a snapshot of my routed net using those commands to confirm its functionality. Thank you !

 

You had to add connect_net commands for the CLK and RST?
 

If you place the cell in the slices with pre-defined global signals, No, it is not required since they will be connected automatically, otherwise you have to script the global signals' connection to the cells (FDCEs)

- - - Updated - - -

ads-ee said:
You had to add connect_net commands for the CLK and RST?
Click to expand...


Dear @ads-ee,

I did not create a new post for this question since it is related to this post. As I look to the SLICE configuration, I see the flip-flops AFF, A5FF, DFF, and D5FF are of type of "CELL" and the BFF, B5FF, CFF, and C5FF are of type "BEL". BELs or logic elements are related to LUTs. I am wondering if there is a command to create and place LUTs using Tcl script as we do for flip-flops (FDCEs). I have looked at UG835 and I did not find any command related to LUT creation and placement ! Do you have any idea?

Thanks and Regards,

- - - Updated - - -

msdarvishi said:
If you place the cell in the slices with pre-defined global signals, No, it is not required since they will be connected automatically, otherwise you have to script the global signals' connection to the cells (FDCEs)

- - - Updated - - -




Dear @ads-ee,

I did not create a new post for this question since it is related to this post. As I look to the SLICE configuration, I see the flip-flops AFF, A5FF, DFF, and D5FF are of type of "CELL" and the BFF, B5FF, CFF, and C5FF are of type "BEL". BELs or logic elements are related to LUTs. I am wondering if there is a command to create and place LUTs using Tcl script as we do for flip-flops (FDCEs). I have looked at UG835 and I did not find any command related to LUT creation and placement ! Do you have any idea?

Thanks and Regards,
Click to expand...


Dear @ads-ee,

I found the answer of the latter quewstion ! :) I put the answer and will keep the question for future inquieries and other researchers. Based on what was explained in page 117/177 of UG904 (Placing Logic using a Tcl Command), we have to use place_cell command as follows in order to define a LUT (BEL).

Code: 
## If you want to create a LUT6 in order to have access to both O6 and O5 outputs
create_cell -reference LUT6 blue_bel
place_cell blue_bel SLICE_X1Y50/C6LUT


Code: 
## If you want to create a LUT5 in order to only have access to O5 output. Note that in this case, only the LUT inputs A1-A5 are accessible and A6 is not reachable !
create_cell -reference LUT5 red_bel
place_cell red_bel SLICE_X1Y50/D5LUT


Please see the figure below of the results of creating LUT6 and LUT5 with scripts.

REMARK : WE have to carefully pay attention to the rules of placing LUTs and flip-flops (all types, synch or asynch) with their corresponding global signals, otherwise we will receive the Error message by Tcl console preventing the cell placement due to the global signals' violation !!!!



Thanks and Regards,
 

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