Akanimo
Advanced Member level 3
Are you certain this is accurate for VHDL? From what I've read, using default case and safe fsm are independent concepts.
The default state is the state your FSM is initialized into. When you power up your system, the FSM enters the default state. In this case, that state is A. The safe state is that which your FSM reverts to if it eventually enters an indeterminate state. In this case, it is still A.
Take, for instance, that you need five states, A, B, C, D, E. It might be equivalent to a 3-bit register with say 000, 001, 010, 011 and 100. But a 3-bit register can provide eight different values. So where are the rest of the values (101, 110 and 111)? They are undesired states, because you need only five states. If during transition, you eventually enter one of these states (i.e. the register contains 101, 110 or 111), you want to transition to your safe state. This is what others is used for. The state you select to go to with the others clause is your safe state.
Your reset state is that which you go to when you press your reset button. It is often the default state (000...)
There is nothing you can achieve with attributes that you cannot achieve without attributes. They are only made to make coding easier.