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VHDL - native log2 and ceil for value 1

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shaiko

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Hello,

Using the combination of log2 and ceil - one can determine the vector length to store n number of addresses.

Code: 
number_of_bits := integer ( ceil ( log2 ( real ( number_of_addresses  ) ) ) ) ;

But this works well only when "number_of_addresses" is equal to or greater than 2.

For the number_of_addresses = 1 - The above fails and returns number_of_bits = 0.
Which is wrong - because to represent one address you need one bit...

Of course I can write a custom function to solve that, but for the sake of having fun - I decided to avoid that.
Do you have an I idea how to tweak the above to solve the case for the value: 1 ?
 

Why not this?

Code: 
number_of_bits := integer ( ceil ( log2 ( real ( number_of_addresses  ) ) ) ) ;
if number_of_bits = 0 then -- or -- if number_of_addresses < 2 then
number_of_bits := 1; 
end if;
 

Because this implies a custom function.
 

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