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Please help me to write a VERILOG code for MODULO 14 counter

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bynx1234

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I'm very new to verilog code. I have to write a verilog code for mod-14 counter and its test bench. So please help me on this.
 

counter from 0 - 13 back to 0.

Initialize to 0: mod_cnt <= 0

check for mod_cnt < 12 to increment mod_cnt, otherwise set mod_cnt back to 0.
alternatively set mod_cnt to 0 when mod_cnt == 13 and increment mod_cnt otherwise.
 

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