milan.km
Member level 3
hi
assume that I have 192 data(unsigned(7 downto 0), and I want to put them 64 of them into one vector with andices?
"a0" will be 0 to 63
"a1" will be 64 to 127
"a2" will be 128 to 191
because I want to write a for loop for a I want them to have their indices 0 to 2.
is there any way I could do this in vhdl?
srry for the english syntax error,english is not my native language.
assume that I have 192 data(unsigned(7 downto 0), and I want to put them 64 of them into one vector with andices?
"a0" will be 0 to 63
"a1" will be 64 to 127
"a2" will be 128 to 191
because I want to write a for loop for a I want them to have their indices 0 to 2.
is there any way I could do this in vhdl?
srry for the english syntax error,english is not my native language.