[mikrobasic] polling, adc fast and usart pic18f4550

program prova_da_adc_232_4550

'in prova_da_adc_232 

dim t as word
    Text as char[20]
    tword as string[5]
    i as byte

    dim Va as word[7][70] 'bidim. array for anodic voltage
    dim Vk as word[7][70] 'bidim. array for anodic voltage
    dim Ca,g,ch as byte      'Ca ---> sampling, g----> grid voltage

 'function speed adc 
   
  sub function ReadADC(dim Ch as Byte) as word
    ADCON2 = %10001010 '  FOSC/32  ,  2 TAD  ,Right Justified
    ADCON0 =  Ch * 4
    SetBit(ADCON0,ADON)
    SetBit(ADCON0,GO)
    while TestBit(ADCON0,GO) wend   'Wait for Conversion
    Result = ADRESH  * 256 + ADRESL  '10 Bit  Right Justified
    ClearBit(ADCON0,ADON)
  end sub

sub procedure Usart_out

  Usart_Init(9600)

for g=0 to 6
          for Ca=0 to 69

              t=Va[g][Ca] 'load array V anodic and k index Vgrid
                     wordtostr(t,tword)
                     Usart_Write_text(tword)
                     Usart_Write(",")

              t=VK[g][Ca] 'load array V catodic and k index Vgrid
                     wordtostr(t,tword)
                     Usart_Write_text(tword)
                     Usart_Write(";")
          next Ca
next g

end sub

sub procedure setup

    lcd_cmd(LCD_CLEAR)
    lcd_out(1,1,"wait")
    lcd_chr(2,9,"S")
    lcd_chr(2,10,"T")
    lcd_Out(2,11,"ART")
    delay_ms(1000)

end sub

main:

  TRISC=0x00
  PORTB  =0
  TRISB  =0
  intcon =0
  Lcd_init(PORTD)
  lcd_cmd(LCD_CURSOR_OFF)
  lcd_cmd(LCD_CLEAR)
  'Text ="Tube tracer"
  lcd_out(1,1,"Tube tracer")
  Text ="A. Durighello"
  lcd_out(2,1, Text)
  'Setbit(PORTB,1)     'for usb project
  OPTION_REG = $80
  ADCON1     = $82
  TRISA      = $FF
  Delay_ms(1000)
  lcd_cmd(LCD_CLEAR)
  Text  = "Ciclo letture:"
  Delay_ms(2000)
  lcd_out(2,1,Text)

  setup

while true
if (portb. 0 = 1) then

for g=0 to 6  'nr. 7 measure x each Vgrid

  for Ca=0 to 69   '70 campioni per ogni tensione
             'Va[g][Ca]=Adc_Read(0)  'load array V anodic and k index Vgrid
             'Vk[g][Ca]=Adc_Read(1)  'load array V catodic and k index Vgrid
             
             'adc con registri x 18f4550
             Va[g][Ca]=ReadADC(0)
             Vk[g][Ca]=ReadADC(1)
             

             delay_us(3)            'to modify to target a delay about 10msec

  next Ca
  'g=g+1   ' shynchron.

next g
    if (g = 6)  then
       usart_out
    end if

end if
wend

end.