iterativeend
Newbie level 3
Can we design a CMOS input buffer that is capable of accepting inputs with multiple voltage (not at the same time). Let's say a circuit capable of accepting 1.8 V and 2.5 V with output at 3.3 V.
The catch? Using only 0.35 um process. Level shifter's need a 0.18 um or 0.25 um process CMOS at the input before we can convert the signal to 3.3 V, so conventional level shifters cannot be used.
The catch? Using only 0.35 um process. Level shifter's need a 0.18 um or 0.25 um process CMOS at the input before we can convert the signal to 3.3 V, so conventional level shifters cannot be used.
