how to simulate the transconductor?

dear all：
recently I try to simulate the schematic of transconductor in SpectraRF in cadence，the transconductor will be applied into anti-aliasing filter which is made of the architecture of Gm-c.
I come up with the problem for the firse time, when the circuit is defined, I have tried to complete the basic simulation of tran, dc,ac in cadence.but I feel puzzy and helpless,really i don't know how to simulate a transconductor in cadence, will you please share your experience with me and give me some suggest?
I am eager to get your help, thank you very much![/b]

What do you mean, an ideal gm element (that's trivial) or a real OTA? In the latter case, you should know the transistor level circuit.

FvM said:

What do you mean, an ideal gm element (that's trivial) or a real OTA? In the latter case, you should know the transistor level circuit.

Click to expand...

thank you for your reply
what do you mean about the transistor level?
i used nmos and pmos in my circuit, now someone advise me to simulate in pspice,but i don't know how to simulate the transconductor which used in gm-c filter.

I'm working now on transconductors so i could give you some advice..

1)First, you have to check the op. point. Nothing strange, just the usual operation. Be sure that the biasing condition are good for your architecture. Then put a Vdc source connected to the output with value Vdd/2. It will be necessary later. Some current will flows in the output source (offset current due to non-ideal mirrors and due to the non-op value forced by the voltage source).

2) Then, to simulate Gm, apply Vd/2 and -Vd/2 (and Vc) at the inputs, using vcvs. You can use a voltage source named Vd, and two vcvs with gain 1/2 and -1/2 connected one side to another source, Vc, and the other side to the respective input. Then, sweep Vd in your input linear range, and plot the current which flows in the output source with respect to Vd. The slop of the current plot is your Gm.

3) For AC and noise simulation, just set an AC value (1) for Vd. You can plot Gm(jw) just as for Gm in DC, or view the input referred voltage noise using as input source Vd and selecting the current which flows in the output source as output noise variable.

I put for the sake of clarity a simple drawing of the voltage sources configuration.
Hope i've helped (press helped me if so ).
Don't hesitate to ask for further help.

1)First, you have to check the op. point. Nothing strange, just the usual operation. Be sure that the biasing condition are good for your architecture. Then put a Vdc source connected to the output with value Vdd/2. It will be necessary later. Some current will flows in the output source (offset current due to non-ideal mirrors and due to the non-op value forced by the voltage source).

I appreciate for your help,thank you very much!
first, after read your advice i complete the operation point sweep,then i want to do dc analysis.i have some confusion.
"put a Vdc source connected to the output with value Vdd/2"
because my input signal is differential signal, now i turn to simulate the OTA circuit in pspice, i try to complete the dc analysis, so i select the parameter sweep to test the linearity, the sweep variable must be a voltage source or current source,so i can't sweep the differential output current Iod(=iout1-iout2) vs vid(=vip-vin)