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I2C receiving/transmitting system design

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cichylis

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Hello,
I would like to receive nad transmit I2C protocol packets for this purpose I need to design digital circuits. Could you give me any clues how should I start?
 

Hi,

I am not clear about your question. Do u want to design a I2C Master or Slave?
 

First of all go through some document to understand the I2C protocol/waveforms and details of the signals and how they are working? You may refer NXP's LPC9xx series microcontroller user guide/data sheet for understanding, how an 8 bit controller incorporated I2C interface?
I had developed I2C interface design for simple Tx/Rx purpose, inspired from the LPC9xx controllers. It is capable for point to point communication. You can find the files attached. Its just a hobby project and please don't expect a strong professional touch. Also the test bench is very basic!
Its not fully up and tested yet, the receiver have some minor problems. But the transmitter is working. You can look at it for reference.
 

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    cichylis

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I2C is a simple two line protocol, in idle state all the line should be tied to high logical level trough a pull-up resistor. One line is used to trasmit and receive data and the other line for clock sinchronization between the master and the slave.
The data port has to be bidirectional bcz after transmission you've to wait the ACK from the slave then switch the direction from out to input and after receipt it you can continue into the data sending.
Because I2C was a Philips protocol take a look at the link below:
**broken link removed**

Bye
Powermos
 

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    cichylis

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thanks for reply...
the idea of the project is to receive form and transmit to fpga I2C packets.
Predominantly I m interested in schematic design as I have no much experience in vhdl or verilog. FPGA(slave) is responsible for receiving data and passing it further bidirectional. So my intention is to design within FPGA receiver/transmitter for each direction of data flow. I have problem with designing schematic cicruit that firstly would be just recognize (only from one side of fpga),using addresses of the devices if fpga should write or rather read from master. Could you help me with this or maybe recommend some articles, documentation or so...
Thanks for response
 

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