master_picengineer
Banned
PLL Construction
Hi all,
I have a VCO of 800 Mhz (800 Mhz is when Vc=1.6V). When I construct the PLL using this VCO the frequency output of the PLL became 780 Mhz (also Vc=1.6 V).
Is that normal ?
Why this happen and Is there any solution to make the pll delivering 800 Mhz signal like the VCO?
Please Help.
Hi all,
I have a VCO of 800 Mhz (800 Mhz is when Vc=1.6V). When I construct the PLL using this VCO the frequency output of the PLL became 780 Mhz (also Vc=1.6 V).
Is that normal ?
Why this happen and Is there any solution to make the pll delivering 800 Mhz signal like the VCO?
Please Help.