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Comparator inverter stage

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invent

invent

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comparator inverter

Hi,

If I remove the inverter stage (in red), the output will be inverted. i.e +ve to -ve and -ve to +ve.

However, my transient time also suffers. why is that so?
I have tried to tune the remaining transistors to obtained a better transient time but was not successful.

Does any one known why?
 

how to make a inverter with a comparator

The remaing inverter stage gives a large output capacitance for OTA stage. Usually transistors of first inverter stage (after OTA) have small sizes because they give small output capacitance for OTA (less propagation delay) and less crossbar current (less noisy).
It's better for u to insert additition inverter in circuit. As a rule of thumb make transistor size in next inverter stage in 3 times lager.
In general an optimal number of inverter stages in chain dependent from input and output capacitance N=ln(Cout/Cin).
The perfect transient perfomance for continues time comparator can be obtained by using feedback current comparator at the OTA output.

See 00568838.pdf p.708 for feedback current comparator example
Regards.
 

    invent

    invent

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inverter comparator

DenisMark said:
The remaing inverter stage gives a large output capacitance for OTA stage. Usually transistors of first inverter stage (after OTA) have small sizes because they give small output capacitance for OTA (less propagation delay) and less crossbar current (less noisy).
Click to expand...

I have read through those papers and only have a rough idea.

Is there more reading material to help me understand this better, preferably starting with some basics. thanks.
 

hi !

i think comparator output will not give you full swing as you need for digital logic.

For example if the power supply is 3.3V, the high output might have around 3.0V and low output might be aound 0.3V, so you need the first inverter to make the comparator output become full swing. And the second inverter is used to drive the load. If the load is big, you need a few inverters to cascade together to drive the big load.
 

both inverter generate delay to your circuit. also can act as a buffer. attach design spec for further discussion. is has a relation with your transient time (slew rate, delay,rise time, fall time etc)
 

    invent

    invent

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