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How to desgin a clock multiplier with maxplusII ?

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alec82

alec82

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hi gays
i am going to design a clock multiplier with maxplusII.
how can i do it?
best regards
 

clock multiplier

**broken link removed**
 

    alec82

    alec82

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clock multiplier

you may use PLL in Altera FPGA.
 

clock multiplier

No clock multiplier cell in Altera FPGA, PLL is a good choice
 

Re: clock multiplier

you can use many clock doubler with ff and creat symbol with them and use it
 

    alec82

    alec82

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clock multiplier

Does clock multiplier mean that the frequency is doubled? For example, if the original frequency is 25MHz, the frequency will be 50 MHz after multiplier by 2. Am I right?
 

clock multiplier

firstival expresseon clock multiplier, it is really doesn't make sense, because botom line of clock multiplecation is PLL. if you chose to use PLL in your circuit, than it is not really multiplier it is PLL.
 

Re: clock multiplier

hi friends
can you give me some article about using pll?
thanks
 

Re: clock multiplier

Double the Clock Frequency
FPGAs for DPLL
 

    alec82

    alec82

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Re: clock multiplier

See Texas Instruments SN74LS297 DPLL datasheet and application notes
 

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