yolande_yj
Full Member level 3
Hi, I have problems when building pcb for chip testing:
A 1 GHz clock coming from a signal generater is splited by a transformer into differential clock signals, which come to a chip's differential clock input. These clock input pins should be connected to nmos gates (I guess).
Here is my understanding:
1 GHz has a wave length of 30cm, which is much longer than the trace from the transformer output to the chip's clock input. On the other hand, the chip's clock input sense voltage instead of power, so it is not necessary to do matching in this part (from the transformer output to the chip's clock input).
On the other side, the clock signal comes a long way from the signal generator to the transformer input, thus matching is needed.
My question is: is my understanding correct? how to do the matching?
Assume that the transformer turn ratio is 1:n for both positive and negative outputs.
**broken link removed**
Thanks.
A 1 GHz clock coming from a signal generater is splited by a transformer into differential clock signals, which come to a chip's differential clock input. These clock input pins should be connected to nmos gates (I guess).
Here is my understanding:
1 GHz has a wave length of 30cm, which is much longer than the trace from the transformer output to the chip's clock input. On the other hand, the chip's clock input sense voltage instead of power, so it is not necessary to do matching in this part (from the transformer output to the chip's clock input).
On the other side, the clock signal comes a long way from the signal generator to the transformer input, thus matching is needed.
My question is: is my understanding correct? how to do the matching?
Assume that the transformer turn ratio is 1:n for both positive and negative outputs.
**broken link removed**
Thanks.