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What are the specifications of delay locked loop?

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N Suresh

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delay locked loop

Hello everyone
I am doing a project on delay locked loop
I want to know abt. the specific applications regarding DLL, what r the impt. spec'ns of DLL.
thanku
 

Re: delay locked loop

delay locked loop used in CDR's "clock and data recovery"
used in high speed appication in clock tree
also can be used as frequency synthizer

khouly
 

Re: delay locked loop

Specifications would be
1)Peak-peak jitter
2)How many clock phases u r trying to generate (90,180 or 270 deg to get a T/4,T/2/3T/4 clock delays )
3)Divide by counter
4)Loop Filter bandwidth
 

Re: delay locked loop

jittering allowed, bandwidths, locking speed, clocking rate .
application in mostly synthesizers and phase syncronization and clock syncronization in fpga's specially.
 

delay locked loop

1.open loop gain
2.unit gain bandwith(open loop gain)
3.phase noise
4.lock time
and so on
 

Re: delay locked loop

hi!

a dll is better over a pll since most of the times it requires only a 1st order loop filter, while a pll usually requires a loop filter which is atleast of 2nd order.
you can see this article. he gives good specs about a dll.

hope it is useful,
vijay
 
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    mrcai

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Re: delay locked loop

DLL also used in de-skew circuit or frequency multiplier circuit.

Just for your reference.

Yibin.
 

delay locked loop

it can take the place of pll sometime.
 

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