Problem with fanout of net

Hii

I am having two signals enable and operation. Both are 1 bit,registered.
after that ANDing of that two signals are going to some other module;

I have ANDed them in port mapping . so that signals become wire.
and its fanout is much more almost thousand and taking much more routing time.

First I have tried it by puting max fanout constraint over enable and operation but it is not working
I think agian registering that may solve problem by giving one more clock latency.

can you tell me any other way to solve it

please help me


thanks in advance

You can do cloning of the port.

You can duplicate the registers in the code, then add a "dont_merge" attribute on the two parrallel registers. You could also set the "maxfan" attribute if you were getting really picky. But it will help with the fanout on a per-register basis.

thanks TrickyDIcky
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" You can duplicate the registers in the code, then add a "dont_merge" attribute on the two parrallel registers."
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But i have to map it with some port like this
.en(enable && operation);

so after duplicating registers in code how can i map them to en signal? whether you are suggesting me for port cloning or something else ?

and as you said using max fanout attribute. I tried it using but it didn't help me in case of net. Because enable && operation will be net .

By registering that Anded signal and then using fanout has helped me to acheive what I want . But that introduce 1 clock delay which I am trying to avoid.

So please help me .

Thanks

you will have to separate out the signal inside the module. If you dont have a register, that will obviously be a problem, as the fanout is usually measured from a register.