Help on transistor matching with ADS

I found a power transistor that is broadband internally matched FET from Toshiba company. I found it’s S-parameter file(s2p file block) from Toshiba company’s internet site.
I simulate it with S-parameter simulation of ADS with two SP-Probe for impedance watching of it like this:

And the results impedance (in right and left of SP_Probe) are here, too.

Please,tell me why an internally matched FET is not matched? And what should I do?

Can you post S11 and S22 on a smith chart?
Even matched FETs will still show some degree of mismatch. There are usually some reference circuits in the datasheet - it is a good starting point. Also because a FET is an active device, make sure that you use the S parameters for your exact bias point. Alternatively use a nonlinear model.

Why did you use S_Block to check the input/output impedances ? Connect the ports directly to active device.

Inti Innovations said:

Can you post S11 and S22 on a smith chart?
Even matched FETs will still show some degree of mismatch. There are usually some reference circuits in the datasheet - it is a good starting point. Also because a FET is an active device, make sure that you use the S parameters for your exact bias point. Alternatively use a nonlinear model.

Click to expand...

this is s11 and s22 smith charts and rectangular plots.





yes some missmatch not much miss mach
and there is no refrence circuit in datasheet.and i do not use any biasing circuit for this simulation as you see.and also because of i do not have x-parameters i can not use nonlinear model.
thank you
what is your idea?

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BigBoss said:

Why did you use S_Block to check the input/output impedances ? Connect the ports directly to active device.

Click to expand...

i use this to check impedance matching,because in harmonic balance simulation, when i changed the frequency the input power was changed and i found that might be impedance missmatch.

reza064 said:

i use this to check impedance matching,because in harmonic balance simulation, when i changed the frequency the input power was changed and i found that might be impedance missmatch.

Click to expand...

If you use "Power Source with Internal Impedance", the available power will be constant and there will always be mismatch loss due to impedance differences.You target is to minimize this loss by designing a proper mathcing circuit between source and active device.Using S-PORT does not decrease mismatch loss.In ADS, use "Matching Circuit Design Guide" by inserting s-parameters of the transistor then find a proper matching circuit to maximize delivered power from the source to the transistor.

reza064 said:

this is s11 and s22 smith charts and rectangular plots.





yes some missmatch not much miss mach
and there is no refrence circuit in datasheet.and i do not use any biasing circuit for this simulation as you see.and also because of i do not have x-parameters i can not use nonlinear model.
thank you
what is your idea?

Click to expand...

Remove S_block and simulate again. I do not know anything about the transistor you use so can not really comment on the S11/S22 results.
You do not need x params to use a non-linear model. You need.. well a non-linear model of the transistor. ADS have hundreds non-linear models of popular transistor.