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i'm not familier with this optocoupler device.
but it doesnt have to be bidirectional.
i have 6 signals to manage. 5 need to be level shift from 2.5V to 1.8V and another signal from 1.8V to 2.5V.
the signals are digital and squre wave but pretty slow (up to 100KHz period time).
i would prefer to...
Hi All,
i'm looking for an IC level translator (level shifter) in a DIP package from 1.8V to 2.5V an vicaversa.
can any one can refer me ?
thanks!
Zvika.
Hi all,
after doing the file-->export-->stream and insert the layout cellview (+library and tech_file), in the summary it says that each part in my design is translated to a STRUCTURE.
does that means that when i will do an importing of the stream, it wont recognize the Pcells??
(my...
what is the input for the ADC to find the dynamic parameters? what im asking is what input should i use to the ADC (sin wave? in what freq? a ramp? or simply a DC?) and how much samples do i need?
thanks!
can someone tell me what is the input of this matlab code? what im asking is what input should i use to the ADC (sin wave? in what freq? a ramp? or simply a DC?) and how much samples do i need?
thanks!
my problem is because my ADC has ~3000 steps (with FS=2V--> ~670uV for each step) how can i do an ideal DAC that does 3000 steps (~11.55 bits).
any reply regarding the dynamic tests olso??
thanks!!
what do you mean "choose the input frequency correctly"? do you mean that i need to insert a periodic signal to the input (like a sin wave??). i'm asking that because in my simulations i'm runing only the comparator (the input signal is like a DC, i.e. after S&H). can you explain to me (if you...
thanks or your quick answers.
erik:it sounds interensing but as JoannesPaulus wrote, what is the method to choose the number of sin waves ? another thing is if i choose 8 sin waves (with FS=2V) the total number of samples (for a 12 bit ADC) will be 2^(12+3)~33k samples. ??
JoannesPaulus: what...
erikl & JoannesPaulus, thanks for your answer.
every run in the spectre simulation takes ~40sec.
because i simulate 11.5 bit (3000 steps) and i took every step of samples as ~100uV. this will give me a minimum step of 0.15LSB and with resolution of ~14.2 bit.
for this run i nedd approx. ~40000...
Hi all,
after reading the threads regarding INL/DNL i still dont understand something:
i'm simulating a single-slope 12 bit ADC. does it means that for calcuating the DNL i need to run the simulation >(2^12) ?
when i measure INL i simply do an input sweep of ~10 point (from min to max) and...
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