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A On-chip regulator is designed with input volatage:12-25V ,Vout=5V. Current Limit=120mA.
The schematic is shows below,
Vout is connected to outside. Vin=12V, then connect a resistor RL=100ohm to Vout. Regulator can not start-up, Vout only 17mv. RL=200omh, Vout=36mv....If RL...
1. when I use bicmos process to design a simple two stage amp,
if bipolar as different input pair ,then small noise, large gm/Gain, any other..?
if bipoalr as active load and second stage input , then what benefit for it???
2. How to decided a OP Gain, GBW.
For a OP used...
whether i can use a 0.5um 5v cmos process in 7v operation environment ?
the breakdown volatege is more than 8v.
any ....effct or the model is not accuracy??
For a IC i designed , QFN16L 3X3 , Power dissipation is about 1W, 20% of this ICs are over temperature protection.
If use QFN16 4X4, whether can solution it..????
For bipolar process, whether must connnect p_sub to gnd!??
If no , any problem?
I designed a bipolar case, test re sult shows no function and current consumption sometimes very large sometiones is ok..
a 2ohm resistor is needed , what type of resistor is best?
the square is 17ohm +-3ohm for emitter .
L=4.7um. W=40um, then the value is 2ohm,
but how much has the parasitic resistor of contact.
who can help me for this
metal resisitor is not well because the current is large.
the circuit shows below
when LVNMOS is off, simulation result shows that the voltage at point A is high than HVNMOS gate voltage and even exceed the breakdown voltage of LVNMOS.
whether the circuit works as simulation ??[/img]
i'm design a on chip regulator for internal 5v supply, the input max. voltage is 40V.
i apply a pwl voltage source to simulation, when start up , volatege reference is not setted , and regulator output is has a large overshoot
who can help me how to elimilate it.
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