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I find when via add to rule,and used on PCB. the via be change, in the lib via on GND layer is flash, but edit via on PCB, via can became Rectangle,I don't know which rule can be set ,somebody can tell me tank you!
negative layer
In my project, I set GND layer is Negatine, Via packet we attach flash,but in gnd shape I can't see Flash ,I don't know why? who can tall me ,thank ! we use allegro PCB Editor 15.5
unable to find pin name in adfncpin
now ,i rebuild my pcb package symbol,and try again.the error is not change.
i don't know why.who can tell me? thank you!!
error 102 netlist import
I obtain the following session log error when i tried to create netlist from Orcad Capture to be used by PCB Editor for layout. i don't know what error,who can tell what problem in my project.
CmdLine: netrev.exe -5 -y 1 -i e:\source-work\bcm97455mb_v10\allegro...
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