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Recent content by whirl7wind77

  1. W

    HFSS simulation of Transmission Line

    Hi, I am a newbie to EM simulation / HFSS. I used the lumped port (2 port modelling of transmission line ) initially to calculate the S parameters of the transmission line in HFSS. Then I realized that I need to use the waveport to find the characteristic impedance. I made slight modifications...
  2. W

    DC-DC type converter- the low power

    Please, Someone help me out here
  3. W

    Output buffer design - suggestions

    The output resistance of amplifier is 3K. This output is to be connected to load 50 ohms followed by a bypass capacitor through BUFFER . This buffer should not decrease Bandwidth and Gain . [ Supply Voltage is 1.2 V, the output swing is 0.15V and there is no much constraint on power...
  4. W

    Output buffer design - suggestions

    I forgot to mention that the signal is not digital. Its analog. So I think I cannot use CML driver.
  5. W

    Photodiode isolation

    What are the techniques to isolate a photodiode of capacitance 0.6pF from Regulated Cascode Amplifier ( R G C ) ?
  6. W

    Output buffer design - suggestions

    3 dB frequency is around 8 GHz. [This buffer exists between the output of the amplifier and the load which is a high bypass capacitor followed by a transmission line.]
  7. W

    Output buffer design - suggestions

    Can anyone suggest the type of buffer i should use to connect the output to transmission line with Zo 50 ohms through a bypass capacitor.
  8. W

    "Component Display" missing in virtuoso 6.1.6

    Please someone help me out here.
  9. W

    Parameters of NMOS and PMOS in 45 nm CMOS technology

    I could find in my library that there is nmos1v_nat but no pmos1v_nat. Why is that ?
  10. W

    Parameters of NMOS and PMOS in 45 nm CMOS technology

    Thanks. But I find it before your post with your previous hint. I found the model library file i.e., ......045_mos.scs . I searched for vth0 , u0 , toxe . There are too many results. Which one is the correct one ?
  11. W

    Parameters of NMOS and PMOS in 45 nm CMOS technology

    I found the model library file i.e., ......045_mos.scs . I searched for vth0 , u0 , toxe . There are too many results. Which one is the correct one ?
  12. W

    Operational Amplifier - Design

    Hi an_82, This is the first circuit I tried. My supply voltage is 1.2 V. This circuit has a problem maintaining bias points. It consumes hundreds of uW power.
  13. W

    Parameters of NMOS and PMOS in 45 nm CMOS technology

    1)Where can I locate PDK i.e., documentation ? 2)I could find in my library a variety of 1V nmos transistors like nmos1v,nmos1v_lvt,nmos1v_hvt,nmos1v_nat, nmos1v_lvt_3, nmos1v_hvt_3, nmos1v_nat_3. Does 3 at the end mean a 3-terminal device (which means probably a zero Vt) ?
  14. W

    Parameters of NMOS and PMOS in 45 nm CMOS technology

    Where can I find/What are the parameters of NMOS and PMOS ( like VTno, VTpo , Kn , Kp ) in 45 nm CMOS technology ? [By simulation I found that VTn is approx. 0.4-0.5V . Is it not too high ? ]
  15. W

    "Component Display" missing in virtuoso 6.1.6

    Hi gag2000, The warning message is : *WARNING* (icLic-3) Could not get license Virtuoso_Schematic_Editor_L *WARNING* (icLic-21) License Virtuoso_Schematic_Editor_L ("95100") is not available to run Schematics L. Trying to check out the license Virtuoso_Schematic_Editor_XL ("95115") instead...
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