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Recent content by weilijun

  1. W

    Where can I get the STVLIB library for VHDL ?

    Re: VHDL Library Please try the following address : **broken link removed** Hope it is of any help.
  2. W

    Looking for info about verification languages and tools

    Re: Verification You can also use verilogHDL + PLI to simulate. A good book to write testbench: writting testbenches Functional verification of HDL models.
  3. W

    SystemC learning resources

    In now days, systemC is mainly for system design. So I think the book "system design with systemc" is a good learning material. You can check the book content list from amzon.
  4. W

    SystemC books on free mirror

    system design with systemc google books How about the book : system design with systemC and where can I get it?
  5. W

    Problem with using Simulate Behavioral Model in Modelsim

    Re: Modelsim help If you want to run the simulation for a longer time, you should do the following: restart -f run 5ms
  6. W

    What to choose for DSP design? Xilinx or Altera?

    Re: Xilinx or Altera I have used the DSP blocks in altera's FPGA. It is easy to design and can run to a high frequency.
  7. W

    Which course should I choose DSP or VLSI ?

    Re: DSP vs VLSI You can use HDL to develop DSP function modules. I suggest you to read the following book: Digital Signal Processing with Field Programmable Gate Arrays --by Meyer-Baese
  8. W

    about building high-level model

    I think systemC is a better choice if you want to build hardware model.
  9. W

    SystemC will die? Why, can anybody give an explain?

    I think systemC, systemverilog and VerilogHDL will coexist for a long time. SystemC development tools are relatively expensive. If its price goes down, it will account for a larger market.
  10. W

    any sample VHDL code for FPGA DSP filter??

    Digital Signal Processing with FPGA is a good book for implementing DSP functions using FPGA.
  11. W

    PLI in Verilog in which we could model the RAM elements

    Re: verilog pli "The Verilog PLI Handbook: A User's Guide and Comprehensive Reference on the Verilog Programming Language Interface" (The Kluwer International Series in Engineering and Computer Science, Volume 666) -- by Stuart Sutherland; Hardcover (Rate it)
  12. W

    Where to find articles about VHDL and programs?

    Re: Where to find VHDL ? HDL Chip Design is a good book for both VHDL and VerilogHDL learning.
  13. W

    both rising_edge(clk) and faling_edge(clk) in one progrm,ok?

    faling_edge vhdl You can use both rising_edge and falling_edge in an architecture. All work can be left for synthesis tool to do.
  14. W

    Work with host filesystem in VHDL

    It is possible.
  15. W

    multiple constant drivers problem, how to resolve

    multiple constant driver Where is your "d0[3]"?
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