Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by waynesuvol

  1. W

    Questions about Mixed-signal circuit simulation in PSPICE

    Thanks！ I think I can also add input/output cap and delay element to the ideal digital logic to make it more realistic~
  2. W

    Questions about Mixed-signal circuit simulation in PSPICE

    Hi everyone! I am new to Pspice and I want to simulate a mixed-signal circuit. I have a question about the digital component library in Pspice. Like the logic gates in 74HC library, are these gate ideal model? Or these gates already come with their parameters, like propagation delay...
  3. W

    Problems when simulating a simple analog integrator in Pspice

    Yes, I got my ramp! I just set the initial condition of the capacitor to zero(which I forgot to do so before) and then get the expected result.
  4. W

    Problems when simulating a simple analog integrator in Pspice

    Hi KerimF! Thanks for your detailed analysis of this circuit!! I am really grateful that you did this, and I really learn from you a lot! Your analysis is right, at least I agree with you all:grin: The whole process happens as what you posted. It is my fault that I did not state my...
  5. W

    Problems when simulating a simple analog integrator in Pspice

    Hi LvW! Thanks for your comments! I strongly agree with you! Problems come when people are not familiar with the SPICE program! So, if we want to play the games, we must obey the rules! Thanks again!
  6. W

    Problems when simulating a simple analog integrator in Pspice

    Hi Kerimf! Thanks for your advice! I am really sorry for the late reply because I live in U.S. So there is time difference between us... I was sleeping when you were discussing the questions...Sorry for that! For the question you asked me The output should be "V+ minus V-" *...
  7. W

    Problems when simulating a simple analog integrator in Pspice

    Hi Kerim, Why the result is normal? The capacitor should be charged, right? But no charging happens...... The DC operating point simulation showed that, the voltage of inverting input terminal is not near ground. It is equal to the input voltage......too bad.... This should be something...
  8. W

    Problems when simulating a simple analog integrator in Pspice

    Hi everyone! I am now trying to simulate the behavior of a conventional analog integrator in Pspice. The circuit is simple, capacitor in the negative feedback loop around the ideal opamp. I attach the schematic. I use a DC source as the input of the integrator. I just want to see the...
See more

Part and Inventory Search

Back
Top