Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by vysakhk

  1. V

    Difference between circuit port and lumped port in HFSS

    Hi, I am new to the HFSS software. I saw an option to define the ports either as a lumped port or as a circuit port. Can some one please help me with the difference between them? And also I am not sure how would the dimension of ports affect in either of the cases.
  2. V

    Nport instance connection in cadence

    Hi , I am a little bit confused on how to to connect the nport in the case where I have a 2-port transmission line s-parameter file which is excited by a port on one side and loaded by a 1pF capacitor on the other side. As shown in the figure there are different ways of connecting the nport...
  3. V

    Convergence issue in Large Signal S-Parameter simulation

    Hello All, I'm try to make a RF-DC converter, which includes some diodes. When I'm trying to match the input side for a specific power in LSSP simulation, say for 5dBm, I'm getting the following graph, I can see a sudden jump for a very small frequency change. Is there any change to be made...
  4. V

    EMPRO-SMA Connector in ADS

    Hi All I'm trying to use the SMA_Top_Mount present in the 'basic component list for ADS', provided with the examples of EMPRO. When I instantiate the layout file of the SMA in my ADS layout, the size of the layout looks small, but it looks proper in the 3D view. Please refer the fig for the...
  5. V

    SMA Connector-ADS Simulation-Ports

    Hi I'm simulating a two layer PCB layout in ADS, which has an SMA connector to a coplanar transmission line. The figure shows how the ports are connected to the SMA connector. For simulation purpose I've removed the PTH VIA from the signal feed. In the EM setup the port P1 is made + and P4 is...
  6. V

    Why is Vbe less when emitter area is more?

    Hi Cheenu Let me put it in this way. When you increase the emitter size its like keeping so many pnp transistors in parallel. So when you pump a current, lesser current will be flowing through a single trasistor, which decreases the vbe of that transistor. As these are in parallel, the vbe of...
  7. V

    spectre terminated prematurely due to fatal error.

    Hi It would be nice if you can type the complete error message. First look at the error message looks like you haven't added necessary model files. For the goto setup>model libraries.

Part and Inventory Search

Back
Top