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Recent content by vinodhsaminathan

  1. V

    doubt in shielding metal layer

    Hi, What are the different types of shielding available? i know single side shielding, double side shielding and 360 degree shielding? but i came to know one more type is avilable, if so pls mention and explain it. Thanks
  2. V

    doubts in shielding and matching

    hi, While doing coaxial type shielding, why we are using one higher metal and one lower metal? why cant we use same higher metal or lower metal?
  3. V

    doublts in antenna effect

    Hi, Why only reverse biased diode is used to reduce antenna effect? what will happen when it is forward biased?
  4. V

    Difference between N-well and Deep N-well

    Hi, Pls explain what is the difference between N-well and Deep N-well?
  5. V

    doubt in finger concepts

    Hi, Why it is advisable to share drain of transistor than source of transistor while making finger? what impact it will give ? Thanks
  6. V

    Information needed in 45nm technology

    Hi, I am currently working in 65nm analog layout designs. i am going to work in 45nm technology. so pls somebody tell me, what are precautions and measures i have to consider. if possible pls send related links and documents. Thanx
  7. V

    effects of voltage drop

    Hi, What are the major effects of voltage drop in cmos circuits ?
  8. V

    doubts in shielding and matching

    hi, I understood why we are doin matching, but i cant understand how the process gradients getting canceled on x- direction on inter leaving technique and x and y direction on common centroid technique? we are just placing transistors in different manner, but hw this cancellation is happening...
  9. V

    doubt in half cell symmetry

    Hi, I just want to know what is meant by half symmetry of a block. suppose if am having a diff pair, i have done layout for one transis, if am flipping tat block and keeping it as another input of diff pair and making mirror image. then it s called symmetry right. correct me if am wrong. suppose...
  10. V

    doubt in half cell symmetry

    Hi, what is meant by half cell symmetry? Is it different from mirrored image? what is advantage of keeping blocks in half symmetry way than mirror image way? pls explain
  11. V

    explain about phase and frequency

    Hi what is phase?What is the difference between phase and frequency? how they are relate to each other? (in PLL) Thx - - - Updated - - - Also explain how a PLL generate phase? can two signals have same frequency but different phase?
  12. V

    doubts in shielding and matching

    Hi, 1. What happens when we do matching? Why we are doing inter leave matching for current mirror, resistors and common centroid matching for differential pair, capacitors?what happens when do reverse? how matching prevents device from process gradients? 2. I know 3 types of shielding, is...
  13. V

    problems using wider metal width

    U will get a very high parasitic capacitance. since c directly proportional to width. sometim cross talk also.
  14. V

    problems using wider metal width

    Hi, What is metal grain size ?
  15. V

    how to route signal on n-well

    Hi, I read the below sentence in a document. i am unable to understand how to land a signal on top of n-well.can anyone explain pls? For signals going to a sensitive block, land them first, on top of an n-well and then use a via-bridge and then take them further. This helps to reduce unwanted...
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