Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
hi
I have two SDC file.
1) Function
2) Bist
Before CTS, make the ctstch file.
so, what i want to know is..
Is there nothing problem, CTS/ function clock with bist clock?
or CTS each other, function and bist clock?
if second method is correct,,
function CTS
optimize
Bist CTS
optimize
MMMC...
hi
in deep sub micron
what is the better one
1. short metal length
2. long metal length
in dsm, long metal(long net) increase the delay
so i think short metal is better than long metal
is it right?
if so, how can reduce the metal length in PnR? (encounter)
thank you
i'm pool at english, just listen TT
second order effect, in mosfet, punch through,
how can flow the 'current' through depletion region??
is that region cannot flow the current, right?
i cant understand why the current flow on punch-through.
avalanche breakdown?
i'm pool at english, just listen TT
second order effect, in mosfet, punch through,
how can flow the 'current' through depletion region??
is that region cannot flow the current, right?
i cant understand why the current flow on punch-through.
avalanche breakdown?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
