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Recent content by Valerius

  1. V

    [SOLVED] Verilog- Inside case statement, bit-selected regs w/reduction operator doesnt work

    Hi everyone, I am designing a FSM machine that controls speed configurations of my step motor. It is ALMOST done, however this bug gave me no other choice but posting it here. I can provide more code if wanted. //Speed indexes parameter _40 = 11...
  2. V

    Unsupported Event Control Statement - Verilog HDL

    Thanks for your kind words :) Yes its been couple of weeks since I started learning Verilog. And I'm aware that its just a typo.. correct version would be: assign EN1 = keyOUT > 9 ? 1'b1 : 1'b0;
  3. V

    Unsupported Event Control Statement - Verilog HDL

    Yes, probably because I just started learning Verilog :) I was trying to slow down my clock to use it on my 2 digit seven segment display, My clock has a frequency of 50 Mhz and I need to slow it down to 800Hz, do you have any suggestions on doing this?
  4. V

    Unsupported Event Control Statement - Verilog HDL

    Hi, I'm trying to debug my code which takes 4x4 keypad inputs and displays the corresponding key index to the seven segment 2 digit display. However I encountered with the following warning: ERROR:Xst:850 - "topModule.v" line 60: Unsupported Event Control Statement. ERROR:Xst:850 -...
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    7-Segment 4 Digit display Anode is enabled when 0

    Hello everyone, I am confused about my BASYS2 FPGA board's common anode seven segment 4 digit display's function. In user manual(and also tested in Verilog code), the desired digit is enabled when the anode is driven to 0(e.g. to enable the rightmost digit the bus should be 1110 each of which...
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    Verilog: 8-bit Adder Error: The logic does not match a known FF or Latch template

    As far as I can understand that the hardware required to implement the code below is not supported in Xilinx ISE Web Pack. I'm trying to implement only the functionality of the 8-bit adder using an always block. Here's the code: module Addr_8bit(Clk, Rst, En, LEDOut ); input Clk...
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