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opengl fpga
Hi again! I'm trying to do something by myself. Realization of such things as drawing line and circle(bresenham) in vhdl was not trivial for me. I have a spartan dev. board and I access to frame buffer via MPMC. To my mind share one memory for program and frame buffer is not good...
ssram
Hello dear friends.
Please, help me understand some things about ssram(cypress).
Get, for example, CY7C1381C.
In datasheet we see that it is 512K X 36/1M X 18 Flow-Thru sram. What does it means? What amount of memory we have? I see only 19 pins of address bus. With 19 pins we can address...
Hello!
I'm developing a system in verilog where modules connected together via shared bus.
Can anyone suggest me the way
1)how to connect modules clocked at different frequences
2)how to realize bus arbitration logic
Many thanks!
schematic osciloscope input
Hello laktronix, thanks for comprehensive reply.
How to take samples at different phases? To use PLL will make rather difficult schematic (and is not clear for me, especially how to switch between real-time mode and RIS-mode). May be this phase shift implemented in...
oscilloscope input circuit
Hello!
Please see this boards https://www.knjn.com/docs/KNJN%20Flashy%20boards.pdf
It has a very interesting function - period out. Anyone know what components he use? How period of signal can be abtained? In my opinion, if he use comparator, equivalent sampling...
Re: GUI for embedded Linux
Hello. The question is not right (which is better?) What gui to use is depend of your project demands.
nano-x (www.microwindows.org) gui is famous for it very small size (<100kb). It suppots windows drawing and it has win32-like API. There are some extentions to it...
cost of lcd
Hello!
I'm looking for a low cost color graphic LCD. Resolution 320x240(min), 480x320 (good), 640x480(max). It should have 8 or 16 color. All models what I found in net have controllers(e.g.SED). But I want to make my own controller in FPGA.
Hello jonw0224. Thank you for a good explanation.
Do you know the methods how to realize sampling in equivalent time (RIS mode)? I tried to use analog comparator with FPGA (fpga has 1 counter - with 100Mhz clock, 2 counter - with 99.0099Mhz clock) Then, I have difference in edges about...
digital osilascope schema
Hello dear all.
I also develope my scope. In my plans to make it more versatile:
First of all in my plans to make programmable attenuator. But is seems too difficult... So it would be wonderfull to use ready made. Whether there are suppliers of P.A. on market...
Re: ad &fpga
Thank you for reply, echo47!
I know, that Virtex-4 and Virtex-5 like StratixII, StratixIII can input > 1 gigabit/sec, but they are rather expensive. In my plans use low costs Cyclone/Spartan FPGAs with 840Mbps LVDS inputs, so I use 1:2 demux.
It's a good idea of splitting data...
Re: ad &fpga
Hello!
I have the same task: 8 bit 1Ghz ADC + FPGA. I'm going to use demux. But I need in REAL TIME DSP functions. Is it possible to realise math functions <,>,+,*, and FIR working with 64bit samples, as if it is 8 bit samples?
Many thanks!
Hello good people!
I develope DSO as my diploma project. Digital part of the device I decided realise in FPGA. But I do not know how competently design analog part of the device(programmable attenuation/div, overvoltage protection). Morover, there are many traps in PCB design, for example how to...
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