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Hi there.
Can anyone help me understand more about "interaction per second" when we talk about embedded processor benchmarking?
do you know any documents, link that explain about these terms?
thank you very much
PCIE system
Hi there
As I know in normal PCIE system, we have CPU, root complex and Switch ... and end point is PCIE. Let say in PC main-board, I can think "root complex" is look like "North Chipset" . Am I right?
So now in FPGA, if you want to build a system that have PCIE IP core, then what...
programming technologies
with Altera device. program is saved in FLASH memory to configue FPGA after powerup, and also have some configuration device( use MAXII) .For best overview you should log on their website for more information
regards
vhdl schematic
i haven't used it before but i think schematic just suitable for very small designs, you should be familiar with writing code. because if you design is big, schematic is not a good way.
good luck
front end silicon design
just like software, use Hardware description language (verilog,VHDL) for descripte your design.and then compilation ,synthesis to the basic level (gate level : transistor). Search forum for more information
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