Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Verifying bit_vector
Hi. I have these ports:
up: buffer bit_vector(1 to 11);
floor: buffer integer range 1 to 11;
How can I verify if there is as least one element after up(floor) that is 1?
For example:
up<="00100000001"
If floor is 2, up(floor) = 0.
If floor is 3, up(floor) = 1.
If I'm...
I'm have a lot of warnings like these:
Warning: Found clock high time violation at 510.0 ns on register "|Vhdl1|andar[3]~reg0"
Info: Detected more than 1000 clock time violations -- stopped clock time violation reporting
What it should be?
Elevator code in VHDL.
I am starting in programming with VHDL, and I already got a project of a controller of an elevator.
From where should I get start? I'm familiarized with programming but VHDL is pretty different from basic form of programming that I know a bit.
If there are some done...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
