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Recent content by tabascorez

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    Cadence tsmc .35u technology

    Thanks for the help
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    Cadence tsmc .35u technology

    Use multiplier or fingers?
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    Cadence tsmc .35u technology

    Hi Can somebody tell me how to get a transistor to millimeter range in a schematic using this technology? I am trying but cadence does not let me go above 200u.
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    Integrated voltage-mode controlled dc-dc buck converter

    So have you already designed your error amplifier?
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    New member seeking advice

    Try to learn Java and start developing android apps
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    Work from home: power electronics/analog design engineer for a project

    I can give you access to my machine by teamviewer if you know how to do it :)
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    Work from home: power electronics/analog design engineer for a project

    No need of layout, only a full working schematic with all transistor sizes for the error amplifier, dead time control circuit and comparator in .35um tsmc process
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    Integrated voltage-mode controlled dc-dc buck converter

    Yes, this is the problem, how to calculate the w/l ratio! Which technology are you using for your design?
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    Work from home: power electronics/analog design engineer for a project

    The work can be completed in one day if you know how to do it;-)
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    Work from home: power electronics/analog design engineer for a project

    Hello I am looking for someone who can DESIGN AN INTEGRATED VOLTAGE-MODE CONTROLLED DC-DC BUCK CONVERTER. The project must be done on cadence using 0.35um technology. All simulations must be completed by team viewer on my machine. It is a one week job and I am willing to pay 200usd upon...
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    Integrated voltage-mode controlled dc-dc buck converter

    Hello I have the following circuit which was designed in AMI0.5 um process which needs to be converted to TSMC 0.35um process for simulation on cadence. Can somebody please tell me how to calculate the transistor sizes in order to have a correct operation? Parameters: Vin=3.7V, Vout=1.8V, load...
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    Help with VHDL code for multiplier

    Hello Can somebody help me with the vhdl code in the attachment. When I elaborate it on design vision, I get the error below. Does anyone know why so and can help out? Thanks library ieee; use ieee.std_logic_1164.all; entity mult is generic ( N : natural :=56 ); port (...
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    [SOLVED] Units conversion 1 dB compression

    Fantastic, thanks for your detailed answer guys :)

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