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Recent content by sys_eng

  1. S

    Why the South Pole of Magnet can affect electron in Hall sensor?

    So, technically speaking electron attracted to + potential or charge. That one I understand. But electron attracted to South Pole of magnet, i do not understand. Which law or theorem says electron attracted to South Pole??
  2. S

    Why the South Pole of Magnet can affect electron in Hall sensor?

    I don't understand. In MOSFET, electron current came from voltage difference it has nothing to do with Magnet.
  3. S

    Why the South Pole of Magnet can affect electron in Hall sensor?

    I thought electrons can only be affected by + or - forces attraction or repulsion of electric charge. But why the South Hole magnet can affect (absorption) of electrons in Hall effect sensor? what's that mechanism?
  4. S

    [Moved]: Why PN junction has P side higher energy level?

    P side has higher energy level than N side why? Whats quantum tunneling of electron from P to N side? Why ? I thought N side has electron and P side has holes.
  5. S

    Majority carrier and minority carrier

    1)in MOS, is nmos majority carrier electrons and minority carrier holes? Likewise pmos majority carrier is holes and minority carrier electrons? 2)How about a CMOS inverter, the top pmos with holes as majority and the bottom nmos with electrons as majority. So the holes of pmos will not flow...
  6. S

    Bipolar circuit schematic has no size specified.

    In MOS circuit schematic, it specifies the W/L size but Bipolar schematic, it doesn't specify the size. How do I know the size of the emitter, collector?
  7. S

    [Moved]: Are most commercial available opamps are MOS based?

    Are most opamp in commercial products are MOS based. Bipolar versions are obsolete? I read about low power opamp are MOS based, but how about wide bandwidth, or fast opamp, or instrument opamp with high precision, are they still MOS based in current commercial product?
  8. S

    Layout layers definition.

    Active, Select, N+ diffusion,, N+ implant, what are the definition and difference of those terms above?
  9. S

    Does diode connected NMOS automatically put it in Weak inversion mode?

    Well, isn't it VGS controls the current being thrown at it? Because Gate and Drain tied then VGS is fixed therefore the current is already known. look at the transistor curve, the different levels of current is controlled by VGS-Vth. but diode connected transistor already has its VGS fixed...
  10. S

    simulation of bandgap circuit

    First thing I modified is the sizing of transistors to reduce the current, I have changed W=100u to 10u, on M21 but the current still remains strong at 192.9uA. I want to bring it down to 1.2uA. How do I do that?
  11. S

    Does diode connected NMOS automatically put it in Weak inversion mode?

    What's the advantage of weak inversion? Diode connected NMOS transistor normally used to set certain Bias voltage.
  12. S

    simulation of bandgap circuit

    I got a bandgap circuit for constant output of vref=550mV . but i simulated , I don't get that, too much difference, I got 4.362 V output for vref and its not independent of supply voltage what's wrong. It's nowhere near the ball park. my actual circuit. the current should be around...
  13. S

    What are PSPICE NMOS parameter values?

    Because it says so in the paragraph 100u
  14. S

    What's the simplest phase difference detector I can build

    I like use the simplest off the shelf components to build phase difference detector. I do not want to use specialized ICs, the most common IC if possible. What circuit would you recommend?
  15. S

    What are PSPICE NMOS parameter values?

    It says "if L and W default not set, their default value is 100 u" . So W=100u, L=100u by default. If I want to set 10x the width, then M=10 as multiplier.

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