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Recent content by sssliz

  1. S

    how does vsin work??

    hi! i dont get a sine wave with vsin in psice how do i generate a sine wave ,what parameters should i give?? - - - Updated - - - what i get for is a straight line
  2. S

    digital mixer design for software defined radio

    hai...input to the mixer comes from ADC and NCO....we have'nt strdt doin it as we didn find ny information abt digital mixer....
  3. S

    digital mixer design for software defined radio

    haiii :-(:-( can anyone help us with vhdl or verilog code for digital mixer plzzzz???
  4. S

    CIC filter verilog code

    hai we got the vhdl code for NCO....so can u help us with vhdl code for cic filter ?? thanks
  5. S

    CIC filter verilog code

    // cic decimation filter : R=64, M=1, N=3 module cicdecim64 (x_in,y_out,clk,reset); input clk,reset; input [7:0] x_in; output [7:0] y_out; parameter hold=0, sample=1; reg state; //sample or hold states reg [5:0] count; //count till 63 starting from 0 reg [7:0] x...
  6. S

    CIC filter verilog code

    hi,, i am doing a project on SOFTWARE DEFINED RADIO in which i am using a CIC filter which is implemented in FPGA.And hence i need to write a verilog code for cic.can u help me with a simple code please......:-(
  7. S

    numerically controlled oscillator (for SDR) in FPGA

    thanks alot....i understood now
  8. S

    numerically controlled oscillator (for SDR) in FPGA

    input [W_STEP-1:0] step; i understood that step is of 24 bit ,but what does [W_STEP-1:0] mean..?
  9. S

    numerically controlled oscillator (for SDR) in FPGA

    thnx....FvM... what does this statement "input [W_STEP-1:0] step; " in verilog mean?? where step is some input variable and parameter W_STEP = 24; i got these statments from a program to execute nco...i am trying to figure out how that works.
  10. S

    numerically controlled oscillator (for SDR) in FPGA

    thnx... your information was helpful.are those equation alone enough to design nco in verilog???
  11. S

    numerically controlled oscillator (for SDR) in FPGA

    hi! we are doing a project on software defined radio. The digital down converter part in our project contains numerically controlled oscillator. can you help me design nco using verilog plzzz..:)
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