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Recent content by sparso

  1. S

    Value change dump file

    A vcd is an ASCII file that can be easily converted to many ATE test patterns. They then can be run on the ATE to test an IC.
  2. S

    RFID - RFID Chip Manufactures

    Maxim has a few TAGs - MAX66XXX series. 13.56MHz ISO 15693 and 14443 compatible with SHA-1 encryption **broken link removed**
  3. S

    python/perl log file script

    I am in need of a script that reads a log file, takes some data from the file and saves it in a .csv (coma separated value) format. The example log is below: log.txt: Date: 3/14/09 Device #: 1 Test: Cont: pass Test: Leakage: pass Test: INL: 0.88 Test: DNL: 0.56 Device #: 2 Test: Cont: pass...
  4. S

    VHDL? Verilog? Verilog-A? Verilog-AMS?

    I use verilog for purely digital stuff. VHDL is used mainly in Europe and Japan. Not much in the US. Verilog-A to model analog stuff when I need speedy sim time. Have not used Verilog-AMS yet but I think Verilog A is a subset of AMS.
  5. S

    Very basic question: What is .dll file in matlab?

    just note : you can never open a dll file manually , since you will never find a program to open it . I am curious about this as I regularly open .dll files with Visual C++ IDE.
  6. S

    difference between CML and CMOS

    cml input is basically a differential input stage with the collectors open. So the mail structural difference is CML most of the time is on a bipolar process.
  7. S

    msp430 programming using eZ430-F2013 kit

    ez430-f2012 I would like to get one of these. Do any of you guys have a coupon code for this kit?
  8. S

    VCD to ATE vector conversion

    so zigzagfish, How is your answer relevant to my question? Please read my reply to varun. Try to contribute to the original question or don't reply!
  9. S

    I want to Purchase IC- DS1307 In India

    You can buy direct form Maxim. Here is the link **broken link removed**
  10. S

    What's the function of sampling factor in wireless standards?

    fi/fs=m/n The relationship is Fi/Fs = M/N where, Fi = Freq. of interest Fs = The Sampling Freq. M = # of cycles N = # of samples. Fi/Fs = does not have to be an integer but M and N both have to be integers for coherent sampling i.e. to prevent spectral leakage.
  11. S

    What's the sampling frequency for 512 samples/cycle (cycle=50Hz)?

    sampling frequency Although the Nyquist criterion says the freq needs to be at least twice the freq. in reality depending on the signal quality requirement and the available sampling options it should be at least 4 to 5 times. You also have to satisfy the relationship Fi/Fs = M/N. Fi =...
  12. S

    Problem with JTAG as it is not detecting Samsung S3C2410 processor

    JTAG PROBLEM Can you point to any specific xilinx app note?
  13. S

    JTAG Timing and waveform

    jtag timings Thanks much for your help. Just one question - how do you find the time to post 1500+ in 5 months. Amazing!
  14. S

    JTAG Timing and waveform

    jtag waveform Does any one have any material on JTAG timing and how to interpret the waveforms? Thanks.
  15. S

    VCD to ATE vector conversion

    Varun, Please read my post again ...I said "I need to do it myself and I will not have access to any software that cost money" so your suggestions are useless. Please try to reply if you have any thing to contribute. You seem to have zero knowledge on this matter.

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