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Recent content by snake

  1. S

    supplying power using 7805

    it is very simple, uou must have a DC power whit 7.5V at list and put it on the pin 1 of the 7805 the pin 2 you put it on GND so the pin 3 you have the regulated 5V supply. you can use one capacitor in the pin 1 to GND and another in the pin 3 to GND, about 100nf is ok. but remember that you...
  2. S

    Why not the LM339 instead of LM311 in AADE LC Meter clones?

    Re: Why not the LM339 instead of LM311 in AADE LC Meter clon hi all, in these type of circuit they normaly uses a single device to avoid the crostalk between the internal parts, using single devices, so if you dont take some care in the parts that are not used they can interfere in the device...
  3. S

    DIY Spectrum analyzer using tv tuner

    https://www.scottyspectrumanalyzer.com/ try these link, it isn't a tv turner but a good spectrum analyzer project. thx Snake.
  4. S

    How will HFSS use a dual-core CPU to run simulations

    hfss tell to use multiple cores Thx for your answare but .. what variables i must use ??? and the setup for the swep ??? did you have any example ??? thx
  5. S

    How will HFSS use a dual-core CPU to run simulations

    how to activate all 4 cores of a quad core cpu in the same computer with dual core Technology you must say to hfss that you have more than one processor so you must go on the hfss like these tools/options/hfss_options then clik on SOLVER and on number of processors put the number of CORES...
  6. S

    How to simulate the axial ratio in HFSS for a circular plarized antenna ?

    Hi all, Any one have an example of how to simulate the axial ratio on hfss for a circular plarized antenna ????? Im currently using the V11 of hfss. regards.
  7. S

    What Linux version supports HFSS 9.2?

    Hi All, I want to know if someone are runing the HFSS in other linux that not the red hat enterprise. Another thing is that I have the 9.2 version of HFSS does it runs on Linux Thx alot.
  8. S

    post rout simulation on ise 8.2i and modelsim

    hi all, i am trying to do a post rout simulation on ise 8.2i and modelsim 6.0 but it doesnt work modelsim give a mesage saing that the sdf file are not wright. any coments any one knows how to do that ??? thx.
  9. S

    RFID standards wanted ISO 18000 etc.

    try epcglobal.. www.epcglobal.com
  10. S

    Help in Darlington Array ULN2003A

    darlington array circuits Hi, The only diference about a single darlington transistor and an array is that you have to respect de total power dissipation on that device, these chip is normaly use as a switch and not as an amplifier, but whit small power you can use it too. rgs
  11. S

    Does anyone have schematic of VHF power meter?

    Re: VHF power meter yes it will change, if you use a silicom diode de voltage drop will be 0.7V insted of 0.3V that a germanium diode have. you can look for a rf schottky zero bias diode. then in theier datasheet you will find voltage drops that are even less then 0.3, you can look the voltage...
  12. S

    How to synchronize data or signal from different clk domains

    Re: How to synchronize data or signal from different clk dom use a fifo or if you are using VHDL try to generate all the clocks from one big sorce clk.
  13. S

    Does anyone have schematic of VHF power meter?

    Re: VHF power meter sorry, i don´t had time to write here, it is 0,3V or 0.3V here in Brazil we use the , inted of . to show de decimal mark, sorry. these value are the voltage drop that we loose when the germanium diode are in conduct mode and whit low corrent across it. so we can just use...
  14. S

    Does anyone have schematic of VHF power meter?

    Re: VHF power meter it just rectfy the antenna wave then a capacitor charges with the peak voltage, than that level is amplified with a transistor to turn on a led. these circuit just show you that you have some power on the antenna you can use a bether one if you want to know how much energy...
  15. S

    The best way to thoroughly test the DRAM

    Re: Verifying SDRAM I use to have problems in one project years ago in that nature, in my case it was a timing problem you are probable making some concurrent code inside your fpga. you are ina a very very slow speed to have problems with lines and buses, but when you put more code inside the...

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